On Fri, Aug 28, 2009 at 12:17:14PM -0700, Chris Wright wrote: > An SR-IOV capable device includes an SR-IOV PCIe capability which > describes the Virtual Function (VF) BAR requirements. A typical SR-IOV > device can support multiple VFs whose BARs must be in a contiguous region, > effectively an array of VF BARs. The BAR reports the size requirement > for a single VF. We calculate the full range needed by simply multiplying > the VF BAR size with the number of possible VFs and create a resource > spanning the full range. > > This all seems sane enough except it artificially inflates the alignment > requirement for the VF BAR. The VF BAR need only be aligned to the size > of a single BAR not the contiguous range of VF BARs. This can cause us > to fail to allocate resources for the BAR despite the fact that we > actually have enough space. > > This patch adds a support for a new resource alignment type, > IORESOURCE_VSIZEALIGN, and allows struct resource to keep track of the > size requirements of a VF BAR which are smaller than the full resource > size. This could also be done all within the PCI layer w/out bloating > struct resource or using the last available bit for alignment types. Yes, I think that would be preferable. We have a *LOT* of resources in the kernel, and the embedded folks would not find it funny if they all grew in size suddenly. -- Matthew Wilcox Intel Open Source Technology Centre "Bill, look, we understand that you're interested in selling us this operating system, but compare it to ours. We can't possibly take such a retrograde step." -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
