Re: Add qword support to pciutils (Take 5)

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Mon, Jul 06, 2009 at 12:53:54PM -0700, Warren Turkal wrote:
> On Mon, Jul 6, 2009 at 12:22, Matthew Wilcox<matthew@xxxxxx> wrote:
> > Do you want us to start working on an 8-byte atomic access method inside
> > the kernel? ??As I said before, it won't be available on all systems.
> >
> > Or should we stand firm against this bad habit of putting a 64-bit
> > register in config space?
> 
> I'm not sure there is much we can do about it. At least Intel already
> has hardware with 64-bit registers in config space on the market. I
> imagine there will be others.

Interesting!  Which device, out of interest?

> Having said that, my current case doesn't require it, but I am sure it
> would be nice.

Actually, we're safe, it can't be done.  Refer to PCI Express 2.1,
section 2.2.7 where it mandates that the data part of a config packet
must contain exactly one DWORD.  Maybe they'll change that for PCIe 3,
but there's no need for a major firedrill yet.

-- 
Matthew Wilcox				Intel Open Source Technology Centre
"Bill, look, we understand that you're interested in selling us this
operating system, but compare it to ours.  We can't possibly take such
a retrograde step."
--
To unsubscribe from this list: send the line "unsubscribe linux-pci" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[Index of Archives]     [DMA Engine]     [Linux Coverity]     [Linux USB]     [Video for Linux]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]     [Greybus]

  Powered by Linux