On Thu, 21 May 2009 11:10:06 +0900 Kenji Kaneshige <kaneshige.kenji@xxxxxxxxxxxxxx> wrote: > Hi, > > This patch changes ASPM driver to enable more detailed ASPM > configuration. With this patch, > > - ASPM can be enabled partially in the hierarchy. > - L0s can be managed for each direction (upstream direction and > downstream direction) of the link. > > Please see the header of the patch for details. This patch is made on > top of Jesse's linux-next with the cleanup patches I sent recently > (http://marc.info/?l=linux-pci&m=124218428032095&w=2) are applied. > > Thanks, > Kenji Kaneshige > > > Enable more detailed ASPM configuration. > > Summary of Changes > ------------------ > - In the current implementation, ASPM L0s/L1 is disabled for all links > in the hierarchy if one of the link doesn't meet latency > requirement. But we can partially enable ASPM L0s/L1 on sub-tree in > the hierarchy. This patch allows partial L0s/L1 enablement in the > hierarchy. > > - The L0s state can be managed separately for each direction (upstream > direction and downstream direction) of the link. But in the current > implementation, those are mixed up. With this patch, L0s for each > direction are managed separately. > > Implementation Note > ------------------- > - The 'aspm_support', 'aspm_enabled' and 'aspm_default' are changed to > 3-bit variable from 2-bit variable to maintain three states > (upstream L0s, downstream L0s and L1). > > - The 'aspm_capable' field (3-bit variable) is added to maintain the > latency check result of the link. Each bit represents that the exit > latency of corresponding ASPM state satisfies the requirement (i.e. > exit latency < endpoint acceptable latency). Note that if the bit in > 'aspm_support' is cleared, the same bit in 'aspm_capable' is also > cleared. The 'aspm_capable' is updated when a) the link is newly > created, b) the link is destroyed, or c) PCI power state is changed. > Unlike old implementation, once 'aspm_capable' is calcurated, we > don't need latecy check at ASPM policy change. > > - The 'aspm_disable' field (3-bit variable) is added to maintain the > disabled ASPM state of the link. The 'aspm_disable' field is usually > updated through pcie_disable_link_state(), but it is also used to > disable ASPM on blacklist devices (pre PCIe 1.1 devices, for > example). > > - The 'latency' field is separated to two 'latency_up' and > 'latency_dw' fields to maintain exit latencies for each direction of > the link. For L0, 'latency_up.l0' and 'latency_dw.l0' are used to > configure upstream direction L0s and downstream direction L0s > respectively. For L1, larger value of 'latency_up.l1' and > 'latency_dw.l1' is considered as L1 exit latency. > > - In the old implementation, all links were enabled with same state. > New implementation determine the enabled state for each link as > follows. By this change, ASPM can be partially enabled in the > hierarchy. > > enabled = requested & (link->aspm_capable & link->aspm_disable) > > (Note: The 'requested' is from policy_to_aspm_state()) > > Signed-off-by: Kenji Kaneshige <kaneshige.kenji@xxxxxxxxxxxxxx> Anyone have comments on this one? Allowing ASPM to be more granular seems nice, since it'll allow us to save power while still preserving low latency for other parts of the hierarchy. -- Jesse Barnes, Intel Open Source Technology Center -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
