Matthew Wilcox wrote: > @@ -427,11 +425,18 @@ static int msix_capability_init(struct pci_dev *dev, > u8 bir; > void __iomem *base; > > - msix_set_enable(dev, 0);/* Ensure msix is disabled as I set it up */ > - > pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); > + > + /* > + * Some devices require MSI-X to be enabled before we can touch the > + * MSI-X registers. We need to mask all the vectors to prevent > + * interrupts coming in before they're fully set up. > + */ > + pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); > + control |= PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL; > + pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); > + > /* Request & Map MSI-X table region */ > - pci_read_config_word(dev, msi_control_reg(pos), &control); > nr_entries = multi_msix_capable(control); > > pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset); I suppose why you move enable MSI-X so early is because it might be required before we do write_msi_msg() in arch_setup_msi_irqs(), i.e. enabling MSI-X might be required not only before touching Vector Control for MSI-X Table Entries but also before touching other registers in the Table Entries (such as Message Data, Message Address), right? I think it is not required at the moment, since it seems that the NIU problem is only on Vector Control register. At least it was OK on David's test. Thanks, H.Seto -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
