* Ivan Kokshaysky <ink@xxxxxxxxxxxxxxxxxxxx> wrote:
> > +/* need to insert those two under iomem */
> > +struct resource iomem32_resource = {
> > + .name = "PCI mem 32bit",
> > + .start = 0,
> > + .end = 0xffffffff,
> > + .flags = IORESOURCE_MEM,
> > +};
> > +struct resource iomem64_resource = {
> > + .name = "PCI mem 64bit",
> > + .start = 1ULL<<32,
> > + .end = -1,
> > + .flags = IORESOURCE_MEM | IORESOURCE_MEM_64,
> > +};
> > +
>
> This only works on x86 and similar systems with 1:1 CPU address to
> bus address mapping. There is a lot of machines with multiple
> 32-bit PCI bus spaces (4G per PCI domain).
If you mean this "only" works on 95% of the systems that test the
upstream kernel then yes.
Obviously other architectural needs have to be considered too, but
you are making it sound as if there was some vast, more important
space to consider that Yinghai did not consider in his foolishness
;-)
Ingo
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