On Wed, 2009-02-18 at 13:11 +0800, Zhao, Yu wrote: > Pavel Roskin wrote: > > On Tue, 2009-02-17 at 23:25 -0500, Pavel Roskin wrote: > >>> Saw pci_bus_alloc_resource() allocated resource above 4G for a > >>> non-Prefetchable Memory Space BAR on 64-bit machine. This is not correct > >>> since the non-Prefetchable Memory Space and I/O Space are 32-bit width. > >>> Only Prefetchable Memory Space support 64-bit address. > > > > Sorry for follow-up. > > > > If we are allow prefetchable memory windows for CardBus bridges to have > > 64-bit addresses, then we need to program the upper part of those > > addresses in pci_setup_cardbus(). If it's impossible, then all CardBus > > memory windows should be limited to 32-bit addresses. > > Sorry I don't have the CardBus spec in my hands. Is the > PCI_CB_MEMORY_BASE_0/PCI_CB_MEMORY_LIMIT_0 lower part of a 64-bit BAR? > If it is, then we can enhance the pci_setup_cardbus() to program the > upper 32-bit. Otherwise, we could check the bridge type (header type 1 > or 2) to decide if a prefetch BAR is 32-bit or 64-bit when allocating > resource for it. I looked for specifications online, and I don't see any references to 64-bit addressing in CardBus. CardBus appeared long before 64-bit systems became a commonplace. I assume it's safer not to implement any such addressing. If any specific CardBus bridges support 64-bit addressing, it can be added later. -- Regards, Pavel Roskin -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
