On Mon, Feb 9, 2009 at 5:59 PM, Yinghai Lu <yinghai@xxxxxxxxxx> wrote: > Impact: not assume one place for mmconfig in nb > > prepare for following case: amd fam10h + mcp55 > CPU MSR has some range, mcp55 pci config will have another one. > > also prepare for mcp55 + io55 system. every one will have one range. > > if it s mcp55 detect duties to execlude range that is used by CPU MSR > aka, if CPU state bus 0-255, range in mcp55 need to be dropped. > because HW in CPU will not route that mcp55 mmconfig to handle it. > > v2: fix e7520 exit path > v3: make it could support > PCI MMCONFIG 0 [00-3f] > PCI MMCONFIG 0 [40-7f] > PCI MMCONFIG 0 [80-ff] > > Signed-off-by: Yinghai Lu <yinghai.lu@xxxxxxxxxx> Looks okay to me. I tested the patch on a board with an AMD 0Fh CPU and one MCP55, no ACPI. --Ed -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
