On Mon, Jan 26, 2009 at 11:11:35AM +0900, Kenji Kaneshige wrote:
...
> Thanks to you, I found the root cause of the
> problem. The acpi_pci_get_bridge_handle() function assumes
> pci_bus->self is NULL on the root bus.
Mea culpa: I contributed this mess too. This worked for PA-RISC
and lacking better guidance, is what I used in 1/2 the places.
> But it is not true
> and pci_bus->self can have a non-NULL value on some
> platfroms (like yours). So it must check pci_bus->parent
> instead.
It is true for PA-RISC and some other architectures.
These architectures don't provide fake PCI devices
(emulated PCI config space) for Host-PCI Bus controllers.
> I found some other code that has the same wrong assumption.
> I'll make a fix for them and send it soon.
I would like to keep the code consistent. Attached is a patch
for drivers/parisc. Please include with my
Signed-off-by: Grant Grundler <grundler@xxxxxxxxxxxxxxxx>
Or if you prefer, I can repost as a separate patch.
I've compiled the iosapic/lba changes and will test those shortly.
I have no HW (by choice) to test the dino code change.
thanks,
grant
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index d539d9d..f79266c 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -587,7 +587,7 @@ dino_fixup_bus(struct pci_bus *bus)
bus->resource[i+1] = &res[i];
}
- } else if(bus->self) {
+ } else if (bus->parent) {
int i;
pci_read_bridge_bases(bus);
diff --git a/drivers/parisc/iosapic.c b/drivers/parisc/iosapic.c
index 0797659..1cdfdea 100644
--- a/drivers/parisc/iosapic.c
+++ b/drivers/parisc/iosapic.c
@@ -487,7 +487,7 @@ iosapic_xlate_pin(struct iosapic_info *isi, struct pci_dev *pcidev)
}
/* Check if pcidev behind a PPB */
- if (NULL != pcidev->bus->self) {
+ if (pcidev->bus->parent) {
/* Convert pcidev INTR_PIN into something we
** can lookup in the IRT.
*/
@@ -523,10 +523,9 @@ iosapic_xlate_pin(struct iosapic_info *isi, struct pci_dev *pcidev)
#endif /* PCI_BRIDGE_FUNCS */
/*
- ** Locate the host slot the PPB nearest the Host bus
- ** adapter.
- */
- while (NULL != p->parent->self)
+ * Locate the host slot of the PPB.
+ */
+ while (p->parent->parent)
p = p->parent;
intr_slot = PCI_SLOT(p->self->devfn);
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index d8233de..59fbbf1 100644
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -644,7 +644,7 @@ lba_fixup_bus(struct pci_bus *bus)
** Properly Setup MMIO resources for this bus.
** pci_alloc_primary_bus() mangles this.
*/
- if (bus->self) {
+ if (bus->parent) {
int i;
/* PCI-PCI Bridge */
pci_read_bridge_bases(bus);
@@ -802,7 +802,7 @@ lba_fixup_bus(struct pci_bus *bus)
** Can't fixup here anyway....garr...
*/
if (fbb_enable) {
- if (bus->self) {
+ if (bus->parent) {
u8 control;
/* enable on PPB */
(void) pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &control);
--
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