On Fri, Jan 09, 2009 at 01:40:02PM -0800, Jesse Barnes wrote: > On Friday, January 9, 2009 12:26 pm akpm@xxxxxxxxxxxxxxxxxxxx wrote: > > From: Michal Miroslaw <mirq-linux@xxxxxxxxxxxx> > > As I found out from EDAC driver sources for i82875P some BIOSes for > > i82875P/PE hide 'overflow' device 6. The same thing happens for > > i82865P/PE chipsets. > > > > After testing this patch for couple of days on my laptop (i82856P) it > > looks like something is resetting device 0 (MCH) config register 0xF4 to > > zero and effectively disabling the device again. The delay looks random > > to me. I can easily update the register using 'hexedit > > /sys/bus/pci/devices/0000\:00\:00.0/config' and see correct values in > > lspci output afterwards. > This one already got a NAK until Michal can figure out a way to prevent the > SMM code on his machine from hiding this device periodically. I looked at it again and it turns out that actually nothing is touching this register after bootup. The problem lies in ACPI PNP code from my BIOS it accesses one register from MCH overflow device (installed memory size) and disables it after access. There are no other references to DEV6 in the DSDT disassembly. The quick fix for me is to just remove accesses to DEV6 bit from DSDT. A better workaround would be a hook after ACPI PNP resource discovery phase. Maybe EDAC guys have some more examples of what happens on 875P chipsets where the DEV6 is disabled? ---snip--- Device (PCI0) { [...] OperationRegion (REGS, PCI_Config, 0x40, 0xC0) Field (REGS, ByteAcc, NoLock, Preserve) { Offset (0xB4), , 1, DEV6, 1 } [...] Method (_CRS, 0, Serialized) { [...] CreateDWordField (RSRC, \_SB.PCI0._Y00._MIN, BTMN) Store (One, DEV6) Multiply (0x04000000, DRB7, BTMN) Store (Zero, DEV6) [...] ---snip--- Best Regards, Michał Mirosław -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html