Re: ATS capability support for pciutils

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On Mon, Nov 10, 2008 at 10:43:25AM +0800, Yu Zhao wrote:
> Following patch adds Address Translation Services (ATS) capability
> support for pciutils.
> 
> The current release of ATS spec is v1.1, and can be obtained from:
> http://www.pcisig.com/members/downloads/specifications/iov/ats_r1.1_22Apr08_cb.pdf

This isn't commenting on the patch - just the availability of the spec:

grundler@mb500:~/tmp$ wget http://www.pcisig.com/members/downloads/specifications/iov/ats_r1.1_22Apr08_cb.pdf
--2008-11-09 20:10:08--  http://www.pcisig.com/members/downloads/specifications/iov/ats_r1.1_22Apr08_cb.pdf
Resolving www.pcisig.com... 66.179.20.217
Connecting to www.pcisig.com|66.179.20.217|:80... connected.
HTTP request sent, awaiting response... 401 Unauthorized
Authorization failed.

thanks,
grant

> 
> Following is a brief summary of the capability:
> 
> 31                       15                        0
> +--------------------------------------------------+
> |          ATS Extended Capability Header          | 00h
> -------------------------+-------------------------+
> |  ATS Control Register  | ATS Capability Register | 04h
> -------------------------+-------------------------+
> 
> Following is the output from the patched 'lspci':
> 
> 	Capabilities: [1c4] Address Translation Service (ATS)
> 		ATSCap:	Invalidate Queue Depth: 00
> 		ATSCtl:	Enable-, Smallest Translation Unit: 00
> 
> 
> The testing was done with Myri-10G PCI Express NIC:
> http://www.myri.com/Myri-10G/NIC/10G-PCIE-8B-2S.html
> 
> 
> Thanks,
> Yu
> 
> ---
>  lib/header.h |    8 ++++++++
>  lspci.c      |   19 +++++++++++++++++++
>  2 files changed, 27 insertions(+), 0 deletions(-)
> 
> diff --git a/lib/header.h b/lib/header.h
> index aa163a0..4e84f07 100644
> --- a/lib/header.h
> +++ b/lib/header.h
> @@ -220,6 +220,7 @@
>  #define PCI_EXT_CAP_ID_VNDR	0x0b	/* Vendor specific */
>  #define PCI_EXT_CAP_ID_ACS	0x0d	/* Access Controls */
>  #define PCI_EXT_CAP_ID_ARI	0x0e	/* Alternative Routing-ID Interpretation */
> +#define PCI_EXT_CAP_ID_ATS	0x0f	/* Address Translation Service */
>  #define PCI_EXT_CAP_ID_SRIOV	0x10	/* Single Root I/O Virtualization */
>  
>  /* Power Management Registers */
> @@ -953,6 +954,13 @@
>  #define  PCI_ARI_CTRL_ACS	0x0002	/* ACS Function Groups Enable */
>  #define  PCI_ARI_CTRL_FG(x)	(((x) >> 4) & 7) /* Function Group */
>  
> +/* Address Translation Service */
> +#define PCI_ATS_CAP		0x04	/* ATS Capability Register */
> +#define  PCI_ATS_CAP_IQD(x)	((x) & 0x1f) /* Invalidate Queue Depth */
> +#define PCI_ATS_CTRL		0x06	/* ATS Control Register */
> +#define  PCI_ATS_CTRL_STU(x)	((x) & 0x1f) /* Smallest Translation Unit */
> +#define  PCI_ATS_CTRL_ENABLE	0x80	/* ATS Enable */
> +
>  /* Single Root I/O Virtualization */
>  #define PCI_IOV_CAP		0x04	/* SR-IOV Capability Register */
>  #define  PCI_IOV_CAP_VFM	0x00000001 /* VF Migration Capable */
> diff --git a/lspci.c b/lspci.c
> index ddedb42..6413451 100644
> --- a/lspci.c
> +++ b/lspci.c
> @@ -1591,6 +1591,22 @@ cap_ari(struct device *d, int where)
>  }
>  
>  static void
> +cap_ats(struct device *d, int where)
> +{
> +  u16 w;
> +
> +  printf("Address Translation Service (ATS)\n");
> +  if (!config_fetch(d, where + PCI_ATS_CAP, 4))
> +    return;
> +
> +  w = get_conf_word(d, where + PCI_ATS_CAP);
> +  printf("\t\tATSCap:\tInvalidate Queue Depth: %02x\n", PCI_ATS_CAP_IQD(w));
> +  w = get_conf_word(d, where + PCI_ATS_CTRL);
> +  printf("\t\tATSCtl:\tEnable%c, Smallest Translation Unit: %02x\n",
> +	FLAG(w, PCI_ATS_CTRL_ENABLE), PCI_ATS_CTRL_STU(w));
> +}
> +
> +static void
>  cap_sriov(struct device *d, int where)
>  {
>    u16 b;
> @@ -1694,6 +1710,9 @@ show_ext_caps(struct device *d)
>  	  case PCI_EXT_CAP_ID_ARI:
>  	    cap_ari(d, where);
>  	    break;
> +	  case PCI_EXT_CAP_ID_ATS:
> +	    cap_ats(d, where);
> +	    break;
>  	  case PCI_EXT_CAP_ID_SRIOV:
>  	    cap_sriov(d, where);
>  	    break;
> -- 
> 1.5.6.4
> 
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