Re: [RFC][PATCH] PCI: Enable Function Level Reset(FLR) for PCI-E

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On Wednesday 10 September 2008 00:45:12 Jesse Barnes wrote:
> On Wednesday, August 27, 2008 10:38 pm Yang, Sheng wrote:
> > +	/* Wait for Transaction Pending bit clean */
> > +	msleep(100);
>
> Looks pretty straightforward, but I wonder if these 100ms sleeps will
> generally be enough?  Or maybe we can make them shorter?  Is there some
> specified time we need to wait after reset (sorry I don't have my spec
> handy).

The spec (6.6 FLR - Implementation Note) said:

" Software polls the Transactions Pending bit in the Device Status register 
either until it is clear or until it has been long enough that software is 
reasonably certain that Completions associated with any remaining outstanding 
Transactions will never arrive. On many platforms, the Transactions Pending 
bit will usually clear within *a few milliseconds*, so software might choose 
to poll during this initial period using a tight software loop. On rare cases 
when the Transactions Pending bit does not clear by this time, software will 
need to poll for a much longer platform-specific period (potentially 
seconds), so software might choose to conduct this polling using a 
timer-based interrupt polling mechanism."

Compared to "a few ms", I think 100ms should be OK here. Maybe we can get it 
shorter. but the spec is not that precise in this point, maybe we can have a 
test? But it's not that general...

But for after reset, we need to wait for 100ms. The spec make it clear this 
time. :)

Thanks!

-- 
regards
Yang, Sheng

>
> Thanks,
> Jesse
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