Re: [PATCH v3 05/20] accel/tcg: Add TCGCPUOps.tlb_fill_align

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On 10/9/24 02:04, Richard Henderson wrote:
Add a new callback to handle softmmu paging.  Return the page
details directly, instead of passing them indirectly to
tlb_set_page.  Handle alignment simultaneously with paging so
that faults are handled with target-specific priority.

Route all calls the two hooks through a tlb_fill_align

Route all calls (of?) the two hooks... ?

function local to cputlb.c.

As yet no targets implement the new hook.
As yet cputlb.c does not use the new alignment check.

Signed-off-by: Richard Henderson <richard.henderson@xxxxxxxxxx>
---
  include/hw/core/cpu.h         |  4 +--
  include/hw/core/tcg-cpu-ops.h | 26 +++++++++++++++
  include/qemu/typedefs.h       |  1 +
  accel/tcg/cputlb.c            | 61 ++++++++++++++++++++++-------------
  4 files changed, 67 insertions(+), 25 deletions(-)

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 04e9ad4996..d21a24c82f 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -205,7 +205,7 @@ struct CPUClass {
   * so the layout is not as critical as that of CPUTLBEntry. This is
   * also why we don't want to combine the two structs.
   */
-typedef struct CPUTLBEntryFull {
+struct CPUTLBEntryFull {
      /*
       * @xlat_section contains:
       *  - in the lower TARGET_PAGE_BITS, a physical section number
@@ -261,7 +261,7 @@ typedef struct CPUTLBEntryFull {
              bool guarded;
          } arm;
      } extra;
-} CPUTLBEntryFull;
+};

  /*
   * Data elements that are per MMU mode, minus the bits accessed by
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
index 34318cf0e6..c932690621 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -13,6 +13,7 @@
  #include "exec/breakpoint.h"
  #include "exec/hwaddr.h"
  #include "exec/memattrs.h"
+#include "exec/memop.h"
  #include "exec/mmu-access-type.h"
  #include "exec/vaddr.h"

@@ -131,6 +132,31 @@ struct TCGCPUOps {
       * same function signature.
       */
      bool (*cpu_exec_halt)(CPUState *cpu);
+    /**
+     * @tlb_fill_align: Handle a softmmu tlb miss
+     * @cpu: cpu context
+     * @out: output page properties
+     * @addr: virtual address
+     * @access_type: read, write or execute
+     * @mmu_idx: mmu context
+     * @memop: memory operation for the access
+     * @size: memory access size, or 0 for whole page
+     * @probe: test only, no fault
+     * @ra: host return address for exception unwind
+     *
+     * If the access is valid, fill in @out and return true.
+     * Otherwise if probe is true, return false.
+     * Otherwise raise and exception and do not return.

Otherwise raise an(?) exception...


Reviewed-by: Helge Deller <deller@xxxxxx>







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