Re: [PATCH v2 02/21] accel/tcg: Expand tlb_fill for 3 callers

[Helge Deller <deller@xxxxxx>]

On 10/5/24 22:05, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@xxxxxxxxxx>


Reviewed-by: Helge Deller <deller@xxxxxx>

> ---
>   accel/tcg/cputlb.c | 33 ++++++++++-----------------------
>   1 file changed, 10 insertions(+), 23 deletions(-)
>
> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
> index fd6459b695..58960969f4 100644
> --- a/accel/tcg/cputlb.c
> +++ b/accel/tcg/cputlb.c
> @@ -1220,25 +1220,6 @@ void tlb_set_page(CPUState *cpu, vaddr addr,
>                               prot, mmu_idx, size);
>   }
>
> -/*
> - * Note: tlb_fill() can trigger a resize of the TLB. This means that all of the
> - * caller's prior references to the TLB table (e.g. CPUTLBEntry pointers) must
> - * be discarded and looked up again (e.g. via tlb_entry()).
> - */
> -static void tlb_fill(CPUState *cpu, vaddr addr, int size,
> -                     MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
> -{
> -    bool ok;
> -
> -    /*
> -     * This is not a probe, so only valid return is success; failure
> -     * should result in exception + longjmp to the cpu loop.
> -     */
> -    ok = cpu->cc->tcg_ops->tlb_fill(cpu, addr, size,
> -                                    access_type, mmu_idx, false, retaddr);
> -    assert(ok);
> -}
> -
>   static inline void cpu_unaligned_access(CPUState *cpu, vaddr addr,
>                                           MMUAccessType access_type,
>                                           int mmu_idx, uintptr_t retaddr)
> @@ -1631,7 +1612,10 @@ static bool mmu_lookup1(CPUState *cpu, MMULookupPageData *data,
>       if (!tlb_hit(tlb_addr, addr)) {
>           if (!victim_tlb_hit(cpu, mmu_idx, index, access_type,
>                               addr & TARGET_PAGE_MASK)) {
> -            tlb_fill(cpu, addr, data->size, access_type, mmu_idx, ra);
> +            bool ok = cpu->cc->tcg_ops->tlb_fill(cpu, addr, data->size,
> +                                                 access_type, mmu_idx,
> +                                                 false, ra);
> +            assert(ok);
>               maybe_resized = true;
>               index = tlb_index(cpu, mmu_idx, addr);
>               entry = tlb_entry(cpu, mmu_idx, addr);
> @@ -1833,8 +1817,10 @@ static void *atomic_mmu_lookup(CPUState *cpu, vaddr addr, MemOpIdx oi,
>       if (!tlb_hit(tlb_addr, addr)) {
>           if (!victim_tlb_hit(cpu, mmu_idx, index, MMU_DATA_STORE,
>                               addr & TARGET_PAGE_MASK)) {
> -            tlb_fill(cpu, addr, size,
> -                     MMU_DATA_STORE, mmu_idx, retaddr);
> +            bool ok = cpu->cc->tcg_ops->tlb_fill(cpu, addr, size,
> +                                                 MMU_DATA_STORE, mmu_idx,
> +                                                 false, retaddr);
> +            assert(ok);
>               index = tlb_index(cpu, mmu_idx, addr);
>               tlbe = tlb_entry(cpu, mmu_idx, addr);
>           }
> @@ -1848,7 +1834,8 @@ static void *atomic_mmu_lookup(CPUState *cpu, vaddr addr, MemOpIdx oi,
>        * but addr_read will only be -1 if PAGE_READ was unset.
>        */
>       if (unlikely(tlbe->addr_read == -1)) {
> -        tlb_fill(cpu, addr, size, MMU_DATA_LOAD, mmu_idx, retaddr);
> +        cpu->cc->tcg_ops->tlb_fill(cpu, addr, size, MMU_DATA_LOAD,
> +                                   mmu_idx, false, retaddr);
>           /*
>            * Since we don't support reads and writes to different
>            * addresses, and we do have the proper page loaded for