On 10/2/24 08:47, Peter Maydell wrote:
There's also something curious going on here -- this patch
says "we check alignment before permissions, and that's wrong
on PARISC". But there's a comment in target/arm/ptw.c that
says "we check permissions before alignment, and that's
wrong on Arm":
* Enable alignment checks on Device memory.
*
* Per R_XCHFJ, this check is mis-ordered. The correct ordering
* for alignment, permission, and stage 2 faults should be:
* - Alignment fault caused by the memory type
* - Permission fault
* - A stage 2 fault on the memory access
* but due to the way the TCG softmmu TLB operates, we will have
* implicitly done the permission check and the stage2 lookup in
* finding the TLB entry, so the alignment check cannot be done sooner.
So do we check alignment first, or permissions first, or does
the order vary depending on what we're doing?
There are two different alignment fault checks. The one for 'alignment fault caused by
memory type' is later, after we verify that the TLB entry is for the correct page, which
implicitly tests r/w permissions.
r~
