On 4/2/23 08:52, Vineet Gupta wrote: > CC Shahab > > On 3/27/23 17:43, Arnd Bergmann wrote: >> From: Arnd Bergmann<arnd@xxxxxxxx> >> >> Some architectures that need to invalidate buffers after bidirectional >> DMA because of speculative prefetching only do a simpler writeback >> before that DMA, while architectures that don't need to do the second >> invalidate tend to have a combined writeback+invalidate before the >> DMA. >> >> arc is one of the architectures that does both, which seems unnecessary. >> >> Change it to behave like arm/arm64/xtensa instead, and use just a >> writeback before the DMA when we do the invalidate afterwards. >> >> Signed-off-by: Arnd Bergmann<arnd@xxxxxxxx> > > Reviewed-by: Vineet Gupta <vgupta@xxxxxxxxxx> > > Shahab can you give this a spin on hsdk - run glibc testsuite over ssh and make sure nothing strange happens. > > Thx, > -Vineet On it. -- Shahab
