On 2/13/23 1:59?PM, Helge Deller wrote: >> Yep sounds like it. What's the caching architecture of parisc? > > parisc is Virtually Indexed, Physically Tagged (VIPT). That's what I assumed, so virtual aliasing is what we're dealing with here. > Thanks for the patch! > Sadly it doesn't fix the problem, as the kernel still sees > ctx->rings->sq.tail as being 0. > Interestingly it worked once (not reproduceable) directly after bootup, > which indicates that we at least look at the right address from kernel side. > > So, still needs more debugging/testing. It's not like this is untested stuff, so yeah it'll generally be correct, it just seems that parisc is a bit odd in that the virtual aliasing occurs between the kernel and userspace addresses too. At least that's what it seems like. But I wonder if what needs flushing is the user side, not the kernel side? Either that, or my patch is not flushing the right thing on the kernel side. Is it possible to flush it from the userspace side? Presumable that's what we'd need on the sqe side, and then the kernel side for the cqe filling. So probably the patch is half-way correct :-) -- Jens Axboe
