Re: [PATCH v2] parisc: Fix spinlock barriers

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On 18.07.20 15:48, John David Anglin wrote:
> On 2020-07-18 9:08 a.m., John David Anglin wrote:
>>>> diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
>>>> index f05c9d5b6b9e..4ba43a3c7c67 100644
>>>> --- a/arch/parisc/kernel/syscall.S
>>>> +++ b/arch/parisc/kernel/syscall.S
>>>> @@ -659,8 +678,15 @@ cas_action:
>>>>  	/* Error occurred on load or store */
>>>>  	/* Free lock */
>>>>  #ifdef CONFIG_SMP
>>>> -98:	LDCW	0(%sr2,%r20), %r1			/* Barrier */
>>>> +98:	sync			/* Barrier */
>>>>  99:	ALTERNATIVE(98b, 99b, ALT_COND_NO_SMP, INSN_NOP)
>>>> +	nop
>>>> +	nop
>>>> +	nop
>>>> +	nop
>>>> +	nop
>>>> +	nop
>>>> +	nop
>>> I think you should put those nop's before the 99:ALTERNATIVE() instruction above.
>>> That way they all get replaced by one jump instead of multiple nops (when
>>> there is only one CPU in the SMP system).
>> Okay.  I'll test.  Thought the replacement was just nops.
> Do we know that a jump is faster than 8 nops?

I don't know if it's faster.

> We need ALTERNATIVE conditions for the barrier defines.

Yes, that's Ok.

Helge




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