On 2019-05-28 1:01 a.m., Helge Deller wrote:
> Fun part is, that I had prepared exactly the same patch two days ago too.
> In addition I added this:
> + /* We currently only support kernel addresses, and sr0 is always 0. */
> + /* BUG_ON(mfsp(0) != sid); */
>
> and explicitely mentioned "%sr0" to make it clear:
> asm volatile ("lci %%r0(%sr0,%1), %0" : "=r" (ci) : "r" (vba));
Personally, I prefer not to mention %sr0 in instructions that use 2-bit space id. The special
case where s=0 causes the selected space register to be determined from the %1 operand.
The selected space register will be %sr4, %sr5, %sr6 or %sr7. These are all 0 when running
kernel code.
Dave
--
John David Anglin dave.anglin@xxxxxxxx
