On 06.04.19 21:49, James Bottomley wrote: > On Sat, 2019-04-06 at 15:36 -0400, Mikulas Patocka wrote: >> Parisc uses a global spinlock to protect pagetable updates in the TLB >> fault handlers. When multiple cores are taking TLB faults >> simultaneously, the cache line containing the spinlock becomes a >> bottleneck. > > You can't do this. As the comment in cache.c says: the lock is to > protect the merced bus, which runs between the CPUs on some systems. > That means it must be a single, global lock. Of course, on systems > without a merced bus, we don't need the lock at all, so runtime > patching might be usable to fix that case. Is there a way to detect if a system has the Merced bus? See arch/parisc/include/asm/tlbflush.h too: /* This is for the serialisation of PxTLB broadcasts. At least on the * N class systems, only one PxTLB inter processor broadcast can be * active at any one time on the Merced bus. This tlb purge * synchronisation is fairly lightweight and harmless so we activate * it on all systems not just the N class. 30% speed improvement by Mikulas patches don't seem lightweight... Helge
