On 2018-10-24 2:47 AM, Meelis Roos wrote:
Enabling PDC_PAT chassis codes support v0.05
Logical CPU #0 is physical cpu #0 at location 0x0 with hpa
0xfffffffffffa0000
CPU(s): 1 x PA8500 (PCX-W) at 440.000000 MHz
alternatives: patching kernel code
Backtrace:
[<0000000040200244>] do_one_initcall+0x6c/0x1d0
[<00000000401014b8>] kernel_init_freeable+0x230/0x340
[<00000000406be708>] kernel_init+0x18/0x1b8
[<0000000040208020>] ret_from_kernel_thread+0x20/0x28
Kernel Fault: Code=26 (Data memory access rights trap) at addr
00000000406a6e30
PU: 0 PID: 1 Comm: swapper Not tainted 4.19.0-01898-g44786880df19 #167
Hardware name: 9000/800/A500-44
YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI
PSW: 00001000000001000000000000001111 Not tainted
r00-03 000000000804000f 000000004075bd40 0000000040103620
000000004090be28
r04-07 0000000040734540 0000000000000093 0000000040957628
00000000406c73c0
r08-11 00000000408167d8 0000000040745540 0000000040745540
0000000040745540
r12-15 000000004075bd40 00000000401458c8 00000000000000f0
00000000000000ff
r16-19 00000000f00003dc 00000000f000028c 00000000f0002aa4
0000000000000001
r20-23 ffffffffe8000002 0000000008000240 000000001ffffffe
0000000040147a80
r24-27 00000000000000a5 00000000406a6e30 00000000406c7000
0000000040734540
r28-31 0000000040147a50 000000007ec70470 000000007ec70410
0000000004605600
sr00-03 0000000000000000 0000000000000000 0000000000000000
0000000000000000
sr04-07 0000000000000000 0000000000000000 0000000000000000
0000000000000000
IASQ: 0000000000000000 0000000000000000 IAOQ: 00000000401036e8
00000000401036ec
IIR: 0f3f1280 ISR: 0000000000000000 IOR: 00000000406a6e30
CPU: 0 CR30: 000000007ec70000 CR31: 0000000000008020
ORIG_R28: 5555555555555555
IAOQ[0]: parisc_init+0x3d0/0x488
IAOQ[1]: parisc_init+0x3d4/0x488
RP(r2): parisc_init+0x308/0x488
Backtrace:
[<0000000040200244>] do_one_initcall+0x6c/0x1d0
[<00000000401014b8>] kernel_init_freeable+0x230/0x340
[<00000000406be708
] kernel_init+0x18/0x1b8
[<0000000040208020>] ret_from_kernel_thread+0x20/0x28
Kernel panic - not syncing: Kernel Fault
---[ end Kernel panic - not syncing: Kernel Fault ]---
The fault occured executing this instruction "stw r31,0(r25)". Register
r31 contains the following
instruction "pdtlb,l r0(sr1,r3)". This indicates the fault occurred
during alternative patching.
I suspect all kernel TLB entries need to be flushed prior to alternative
patching to ensure that kernel
pages are writeable.
Was this a reboot or cold boot?
Dave
--
John David Anglin dave.anglin@xxxxxxxx
