On 2018-09-20 6:47 PM, Mikulas Patocka wrote:
Perhaps disassembling the HP-UX TLB handlers would be the best option:)
I suppose they selected the optimal implementation.
This is what I see. The situation isn't very clear as I believe the
code may get patched depending
on the processor.
000000000002b0a0 <tbitmss_PCXU>:
2b0a0: d9 19 03 e0 extrd,u,* r8,31,32,r25
2b0a4: 0b 21 02 99 xor r1,r25,r25
2b0a8: f3 19 0c 0c depd,* r25,31,20,r24
000000000002b0ac <pdir_base_patch_021>:
2b0ac: 20 20 00 0a ldil L%500000,r1
000000000002b0b0 <pdir_shift_patch_021>:
2b0b0: f0 21 00 00 depd,z,* r1,63,32,r1
000000000002b0b4 <pdir_mask_patch_021>:
2b0b4: f0 31 04 a8 depd,* r17,58,24,r1
2b0b8: 0c 20 10 d1 ldd 0(r1),r17
000000000002b0bc <tbitloop_PCXU>:
2b0bc: bf 11 20 3a cmpb,*<>,n r17,r24,2b0e0
<tbit_target_miss_PCXU>
2b0c0: 0c 30 10 c8 ldd 8(r1),r8
2b0c4: 50 29 00 20 ldd 10(r1),r9
2b0c8: c4 48 60 3a bb,*<,n r8,2,2b0ec <t_vioref_trap_PCXU>
000000000002b0cc <make_nop_if_split_TLB_2_0_10>:
2b0cc: f5 0e 0d 3d depdi,* 7,22,3,r8
2b0d0: 05 09 18 00 idtlbt r9,r8
2b0d4: 0c 28 12 d0 std r8,8(r1)
2b0d8: 00 00 0c a0 rfi,r
2b0dc: 08 00 02 40 nop
000000000002b0e0 <tbit_target_miss_PCXU>:
2b0e0: 50 21 00 30 ldd 18(r1),r1
2b0e4: bc 20 3f a7 cmpb,*<>,n r0,r1,2b0bc <tbitloop_PCXU>
2b0e8: 0c 20 10 d1 ldd 0(r1),r17
000000000002b0ec <t_vioref_trap_PCXU>:
2b0ec: 20 35 90 14 ldil L%aaa800,r1
2b0f0: 48 21 00 28 ldw 14(r1),r1
2b0f4: 08 01 22 40 or,= r1,r0,r0
2b0f8: e8 20 c0 02 bv,n r0(r1)
2b0fc: 03 96 18 40 mtctl r22,tr4
2b100: 03 c2 18 40 mtctl rp,tr6
2b104: e8 42 04 80 b,l 2f34c <$swap_shadows>,rp
2b108: 03 5a 18 40 mtctl r26,tr2
2b10c: 34 1a 00 02 ldi 1,r26
2b110: 03 00 08 b6 mfctl tr0,r22
2b114: 6a da 00 e0 stw r26,70(r22)
2b118: 03 c0 08 a2 mfctl tr6,rp
2b11c: 02 00 08 b6 mfctl itmr,r22
2b120: 03 fe 18 40 mtctl sp,tr7
2b124: 03 b6 18 40 mtctl r22,tr5
2b128: 23 56 50 02 ldil L%16c800,r26
2b12c: e3 40 2c 08 be 604(sr4,r26)
2b130: 34 1a 00 2a ldi 15,r26
...
--
John David Anglin dave.anglin@xxxxxxxx
