Found this problem while enabling queued rwlock on SPARC.
The parameter CONFIG_CPU_BIG_ENDIAN is used to clear the
specific byte in qrwlock structure. Without this parameter,
we clear the wrong byte.
Here is the code in include/asm-generic/qrwlock.h
static inline u8 *__qrwlock_write_byte(struct qrwlock *lock)
{
return (u8 *)lock + 3 * IS_BUILTIN(CONFIG_CPU_BIG_ENDIAN);
}
Also found few more references of this parameter in
drivers/of/base.c
drivers/of/fdt.c
drivers/tty/serial/earlycon.c
drivers/tty/serial/serial_core.c
Here is our previous discussion.
https://lkml.org/lkml/2017/5/24/620
Based on the discussion, it was decided to add CONFIG_CPU_BIG_ENDIAN
for all the fixed big endian architecture(frv, h8300, m68k, openrisc,
parisc and sparc). And warn if there are inconsistencies in this definition.
v1 -> v2:
Updated the commit messages and acks.
Babu Moger (2):
arch: Define CPU_BIG_ENDIAN for all fixed big endian archs
include: warn for inconsistent endian config definition
arch/frv/Kconfig | 3 +++
arch/h8300/Kconfig | 3 +++
arch/m68k/Kconfig | 3 +++
arch/openrisc/Kconfig | 3 +++
arch/parisc/Kconfig | 3 +++
arch/sparc/Kconfig | 3 +++
include/linux/byteorder/big_endian.h | 4 ++++
include/linux/byteorder/little_endian.h | 4 ++++
8 files changed, 26 insertions(+), 0 deletions(-)
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