Re: Implementing 64bit atomic gcc built-ins

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On 17-Jul-14, at 4:44 AM, Guy Martin wrote:

Reviewing HPPA 1.1 specs, I see that the FPU has 64bit registers.
Can't we use those registers to perform 64bit atomic load and store ?

As far as I can see, FLDDX and FSTDX should be able to do the job.
Unless there is something I'm missing about the FPU :)

The main inefficiency is that one needs to copy a value through memory to get a value in a general register into a floating point register, etc. Probably, for this technique, it would be most efficient to pass the values in floating
point registers.

Most people are running PA 2.0 machines now and these have 64-bit registers and 64-bit loads and stores. Problem is we don't have a proper 64-bit context
on these machines like hpux.  So, we don't save/restore everything on an
interruption. However, it might be possible to use 64-bit operations in the region where interrupts are disabled. Note that interruptions are still possible in this
region but it might be we don't care about the values in this case.

Dave
--
John David Anglin	dave.anglin@xxxxxxxx



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