On Mon, Jun 02, 2014 at 12:56:40PM -0700, James Bottomley wrote: > Architecturally, there is a way we could emulate the atomic exchange > instructions. We could have a special section of memory that always > triggers a page trap. In the Q state dtlb trap handlers we could > recognise the "atomic" section of memory and wrap the attempted > modification in a semaphore. This would add a bit of overhead, but not > a huge amount if we do it in the trap handlers like the TMPALIAS > flushes. This involves a lot of work for us because we have to decode > the instructions in software, recognise the operations and manually > apply the hashed semaphores around them. If we did it like this, all > we'd need by way of mainline support is that variables treated as > atomically exchangeable should be in a separate section (because it's a > page fault handler effectively, we need them all separated from "normal" > code). This would probably require some type of variable marker and if > we ever saw a xchg or cmpxchg on a variable without the marker, we could > break the build. Cute, but I don't think that's entirely feasible given how these things can be embedded in other structures (some dynamically allocated etc..).
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