Re: [PATCH] parisc: fix cache flushing in kmap/kunmap API implementation for aio

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On Sun, 2013-12-01 at 22:18 +0100, Helge Deller wrote:
> This is now the next try to fix the aio bug in our kmap/kunmap
> implementation. It's basically stuff from 

I thought the implementation required us to move to coherency management
in the kmap API?, in which case ...

[...]
> -void kunmap_parisc(void *addr);
> -
>  static inline void *kmap(struct page *page)
>  {
>  	might_sleep();
> +	/* Flush dcache page on CPUs that require coherency. */
> +	if (parisc_requires_coherency())
> +		flush_dcache_page(page);
>  	return page_address(page);
>  }

We have to call flush_dcache_page() unconditionally here.  It's the API
that coheres all the user space mappings.  It has to be called somehow
before the kernel begins operating on the mapped address.

>  static inline void kunmap(struct page *page)
>  {
> -	kunmap_parisc(page_address(page));
> +	/* Always flush kernel dcache, even if CPU doesn't require conherency.
> +	 * Needed on CPUs < PA8800/PA8900 for AIO support. */
> +	flush_kernel_dcache_page_addr(page_address(page));
>  }
>  
>  static inline void *kmap_atomic(struct page *page)
>  {
>  	pagefault_disable();
> +	/* Flush dcache page on CPUs that require coherency. */
> +	if (parisc_requires_coherency())
> +		flush_dcache_page(page);
>  	return page_address(page);
>  }

And unconditionally here too.

And if we do that, I don't see that we need special code for the
pa88/8900 any more.

James


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