[PATCH] parisc: Fix cache coherency for copy/clear_user_page operations

[John David Anglin <dave.anglin@xxxxxxxx>]

As noted by James E.J. Bottomley, we need to purge the kernel TLB  
entries used when copying/clearing
to user pages on PA 2.0 systems that require cache coherency.   
Otherwise, we generate inequivalent
aliases and incorrect cache operation.

The patch also disables preemption around both the TLB and cache  
flushes as it seemed the effect of the
purge might be lost.

So far with approximately two days testing, I have seen no random  
segmentation faults on 4-way rp3440.

Signed-off-by: John David Anglin  <dave.anglin@xxxxxxxx>
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John David Anglin	dave.anglin@xxxxxxxx