Re: threads and fork on machine with VIPT-WB cache

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On Tue, 13 Apr 2010, Helge Deller wrote:

> Still crashes.

After thinking about this some more, I believe out updating of pte's
is broken.  We have a lock, pa_dbit_lock, but this is only used in
the dbit traps.  Even there, the implementation is flawed on SMP
machines.

The fundamental issue is a pte can't be updated in one instruction.
The old pte has to be loaded, modified, and then written back to
memory.  It this isn't made atomic with a lock, we drop write protect,
dirty, and accessed bits occassionally.

Dave
-- 
J. David Anglin                                  dave.anglin@xxxxxxxxxxxxxx
National Research Council of Canada              (613) 990-0752 (FAX: 952-6602)
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