On Thu, Apr 30, 2009 at 5:39 PM, Helge Deller <deller@xxxxxx> wrote:
> diff --git a/arch/parisc/include/asm/system.h b/arch/parisc/include/asm/system.h
> index ee80c92..d91357b 100644
> --- a/arch/parisc/include/asm/system.h
> +++ b/arch/parisc/include/asm/system.h
> @@ -168,8 +168,8 @@ static inline void set_eiem(unsigned long val)
> /* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
> #define __ldcw(a) ({ \
> unsigned __ret; \
> - __asm__ __volatile__(__LDCW " 0(%1),%0" \
> - : "=r" (__ret) : "r" (a)); \
> + __asm__ __volatile__(__LDCW " 0(%2),%0" \
> + : "=r" (__ret), "+m" (*(a)) : "r" (a)); \
> __ret; \
> })
Historical note...
We clobber all of memory in userspace, like this:
~~~
#define __ldcw(a) \
({ \
unsigned int __ret; \
__asm__ __volatile__("ldcw 0(%1),%0" \
: "=r" (__ret) : "r" (a) : "memory"); \
__ret; \
})
~~~
I wonder if I should change that to match the kernel?
This is currently used in the Linuxthreads->NPTL compat code, and in
the old Linuxthreads code.
Cheers,
Carlos.
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