> On Sun, Dec 21, 2008 at 12:27:42PM -0500, John David Anglin wrote: > > > I think the bug may be in flush_user_cache_page_non_current. It hijacks > > > sr3 temporarily and I don't think cr8 is updated when this is done. The > > > switch may need to be atomic. > > > > The following might fix the protection ID bug. > > > > I'm not convinced... this doesn't explain why we don't see this on > 64-bit... Agreed. However, we do have tlb issues on 64-bit and this is just about the only place where sr3 is messed with and cr8 isn't correctly set. I'm sure the bug is somewhat timing dependent. There has to be something else that causes a userspace access with inconsistent space and protection IDs. The cache flush can cause non access tlb misses, and there is some difference in tlb hardware, but cr8 isn't involved in the tlb miss handling as far as I can see. I'm running with the patch on 2.6.28-rc8 (SMP) and 2.6.22.19 (UP). Dave -- J. David Anglin dave.anglin@xxxxxxxxxxxxxx National Research Council of Canada (613) 990-0752 (FAX: 952-6602) -- To unsubscribe from this list: send the line "unsubscribe linux-parisc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
