Re: [PATCHv4 03/33] CLK: OMAP4: Add DPLL clock support

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On 08/01/2013 03:29 AM, Rajendra Nayak wrote:
Tero,

On Tuesday 23 July 2013 12:49 PM, Tero Kristo wrote:
+	dd->control_reg = of_iomap(node, 0);
+	dd->idlest_reg = of_iomap(node, 1);
+	dd->autoidle_reg = of_iomap(node, 2);
+	dd->mult_div1_reg = of_iomap(node, 3);
+
[]...
+	reg = of_iomap(node, 0);

Doing an of_iomap() for every single clock register seems like an overkill
and might have performance penalties at boot.

the other option might be to use offset and a single allocation - but I think Tero should comment if this is possible or if registers on some SoCs are strewn all over the place

--
Regards,
Nishanth Menon
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