Hi,
On Mon, May 27, 2013 at 01:32:57PM +0530, George Cherian wrote:
> This patch modifies dwc3_omap_readl/writel calls to accomodate
> both OMAP5 and AM437x reg maps (It uses the cached register offsets).
> Also renames OMAP5 IRQ1 as IRQMISC, IRQ1 bits as IRQMISC bits.
>
> Signed-off-by: George Cherian <george.cherian@xxxxxx>
can you change this patch a bit so that it adds wrappers around
dwc3_omap_*() ? The idea is the have the code look like:
static u32 dwc3_omap_read_utmi_status(struct dwc3_omap *omap)
{
return dwc3_omap_readl(omap->base, USBOTGSS_UTMI_OTG_STATUS +
omap->utmi_otg_offset);
}
(likewise for write and for all other offsets, of course)
that way, reading/writing to registers which need the offset will be
less error-prone and th driver will look a little nicer.
--
balbi
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