From: Mugunthan V N <mugunthanvnm@xxxxxx> Date: Thu, 2 May 2013 17:22:11 +0530 > In CPSW NAPI, after processing all interrupts IRQ is enabled and then book > keeping irq_enabled is updated. In random cases when a packet is transmitted > or received between processing packets and IRQ enabled, then just after > enabled IRQ and before irq_enabled is updated, ISR is called so IRQs are > not disabled as irq_enabled is still false and CPU gets locked in CPSW ISR. > > By changing the sequence as update the irq_enabled and then enable IRQ > fixes the issue. This issue is not captured always as it is a timing issue > whether Tx or Rx IRQ is invoked between packet processing and enable IRQ. > > Cc: Sebastian Siewior <bigeasy@xxxxxxxxxxxxx> > Signed-off-by: Mugunthan V N <mugunthanvnm@xxxxxx> Applied, thanks. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
