* Russ Dill <Russ.Dill@xxxxxx> [130501 12:07]: > This patch adds the ability to write an I2C sleep sequence from > SRAM just before WFI, and a wake sequence just after control is passed > from the M3. This is useful for adjusting voltages during sleep that cannot > be lowered while SDRAM is active. > > Each sequence is a series of I2C transfers in the form: > > u8 length | u8 chip address | u8 byte0/reg address | u8 byte 1 | u8 byte n ... > > The length indicates the number of bytes to transfer, including the register > address. The length of the sequence is limited by the amount of space > reserved in SRAM, 127 bytes. > > The sequences are taken from the i2c1 node in the device tree. The property > name for the sleep sequence is "sleep_sequence" and the property name for > the wake sequence is "wake_sequence". Each property should be an array of > bytes. > > No actions are performed if the properties are not present in the device > tree. Looks like you should make that into just a regular device driver that lives under drivers/ somewhere? Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
