As RGMII tx clock internal delay is not supported in AM335x, the same has
to be enabled in phy. This patch adds support for enabling tx clock internal
delay via phy debug registers
Signed-off-by: Mugunthan V N <mugunthanvnm@xxxxxx>
---
arch/arm/boot/dts/am335x-evm.dts | 10 ++++++++++
arch/arm/boot/dts/am335x-evmsk.dts | 10 ++++++++++
2 files changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index d649644..72805c5 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -244,3 +244,13 @@
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
};
+
+&davinci_mdio {
+ phy-fixup-registers = <&atheros_txclk_delay_fixup>;
+
+ atheros_txclk_delay_fixup: atheros_txclk_delay_fixup {
+ phy-id = <0x4dd074>;
+ phy-mask = <0xfffffffe>;
+ fixup-registers = <0x1d 0x5 0x1e 0x100>;
+ };
+};
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index f297b85..f398cb3 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -256,3 +256,13 @@
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
};
+
+&davinci_mdio {
+ phy-fixup-registers = <&atheros_txclk_delay_fixup>;
+
+ atheros_txclk_delay_fixup: atheros_txclk_delay_fixup {
+ phy-id = <0x4dd074>;
+ phy-mask = <0xfffffffe>;
+ fixup-registers = <0x1d 0x5 0x1e 0x100>;
+ };
+};
--
1.7.9.5
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