From: "Andrii.Tseglytskyi" <andrii.tseglytskyi@xxxxxx>
This patch introduces aliases for SYS clock nedded for ABB
driver, which will be introduced in the following patch.
Signed-off-by: Andrii.Tseglytskyi <andrii.tseglytskyi@xxxxxx>
---
arch/arm/mach-omap2/cclock3xxx_data.c | 1 +
arch/arm/mach-omap2/cclock44xx_data.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index 45cd264..9784332 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -3540,6 +3540,7 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, "timer_32k_ck", &omap_32k_fck),
CLK(NULL, "timer_sys_ck", &sys_ck),
CLK(NULL, "cpufreq_ck", &dpll1_ck),
+ CLK("483072f0.regulator-abb1", "abb_sys_ck", &sys_ck),
};
static const char *enable_init_clks[] = {
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c
index 88e37a4..0b7914d 100644
--- a/arch/arm/mach-omap2/cclock44xx_data.c
+++ b/arch/arm/mach-omap2/cclock44xx_data.c
@@ -1684,6 +1684,8 @@ static struct omap_clk omap44xx_clks[] = {
CLK("4013c000.timer", "timer_sys_ck", &syc_clk_div_ck),
CLK("4013e000.timer", "timer_sys_ck", &syc_clk_div_ck),
CLK(NULL, "cpufreq_ck", &dpll_mpu_ck),
+ CLK("4a307bd0.regulator-abb1", "abb_sys_ck", &sys_clkin_ck),
+ CLK("4a307bd8.regulator-abb2", "abb_sys_ck", &sys_clkin_ck),
};
int __init omap4xxx_clk_init(void)
--
1.7.9.5
--
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