Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 devices.
Add documentation for the DMM bindings.
Signed-off-by: Andy Gross <andy.gross@xxxxxx>
---
Documentation/devicetree/bindings/arm/omap/dmm.txt | 16 ++++++++++++++++
arch/arm/boot/dts/omap4.dtsi | 7 +++++++
arch/arm/boot/dts/omap5.dtsi | 7 +++++++
3 files changed, 30 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/omap/dmm.txt
diff --git a/Documentation/devicetree/bindings/arm/omap/dmm.txt b/Documentation/devicetree/bindings/arm/omap/dmm.txt
new file mode 100644
index 0000000..5fd1134
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/omap/dmm.txt
@@ -0,0 +1,16 @@
+OMAP Dynamic Memory Manager (DMM) bindings
+
+Required properties:
+- compatible: Must be "ti,dmm" for OMAP processors containing DMM block
+- reg: Contains timer register address range (base address and length)
+- interrupts: Contains interrupt information (source, etc) for the DMM IRQ
+- ti,hwmods: Name of the hwmod associated to the counter, which is typically
+ "dmm"
+
+Example:
+
+dmm: dmm@4e000000 {
+ compatible = "ti,dmm";
+ reg = <0x4e000000 0x800>;
+ ti,hwmods = "dmm";
+};
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 2a56428..53951e9 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -660,5 +660,12 @@
ram-bits = <12>;
ti,has-mailbox;
};
+
+ dmm: dmm@4e000000 {
+ compatible = "ti,dmm";
+ reg = <0x4e000000 0x800>;
+ interrupts = <0 113 0x4>;
+ ti,hwmods = "dmm";
+ };
};
};
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 3dd7ff8..e77af8d 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -667,5 +667,12 @@
ctrl-module = <&omap_control_usb>;
};
};
+
+ dmm: dmm@4e000000 {
+ compatible = "ti,dmm";
+ reg = <0x4e000000 0x800>;
+ interrupts = <0 113 0x4>;
+ ti,hwmods = "dmm";
+ };
};
};
--
1.7.5.4
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