On 12/11/12 08:38, Will Deacon wrote: > diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S > index cd95664..f58248f 100644 > --- a/arch/arm/mm/cache-v7.S > +++ b/arch/arm/mm/cache-v7.S > @@ -44,7 +44,8 @@ ENDPROC(v7_flush_icache_all) > ENTRY(v7_flush_dcache_louis) > dmb @ ensure ordering with previous memory accesses > mrc p15, 1, r0, c0, c0, 1 @ read clidr, r0 = clidr > - ands r3, r0, #0xe00000 @ extract LoUIS from clidr > + ALT_SMP(ands r3, r0, #(7 << 21)) @ extract LoUIS from clidr > + ALT_UP(ands r3, r0, #(7 << 27)) @ extract LoUU from clidr > mov r3, r3, lsr #20 @ r3 = LoUIS * 2 You need to fix this mov as well, right? -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
