On Wed, Nov 21, 2012 at 06:41:05PM +0530, Philip, Avinash wrote: > Some platforms (like AM33XX) requires clock gating from control module > explicitly for TBCLK. Enabling of this clock required for the > functioning of the time base sub module in EHRPWM module. So adding > optional TBCLK handling if DT node populated with tbclkgating. This > helps the driver can coexist for Davinci platforms. > > Signed-off-by: Philip, Avinash <avinashphilip@xxxxxx> > --- > Changes since v2: > - Remove DT property for tbclkgating > - Use devm_clk_get instead of clk_get > > Changes since v1: > - Moved TBCLK enable from probe to .pwm_enable & disable from > remove to .pwm_disable > > :100644 100644 23fd3c3... 6e90829... M drivers/pwm/pwm-tiehrpwm.c > drivers/pwm/pwm-tiehrpwm.c | 16 ++++++++++++++++ > 1 files changed, 16 insertions(+), 0 deletions(-) Looks good. Thierry
Attachment:
pgphnFmO4MrBv.pgp
Description: PGP signature