* Jon Hunter <jon-hunter@xxxxxx> [121114 11:09]: > > On 11/14/2012 12:53 PM, Tony Lindgren wrote: > > Looks like enabling CONFIG_ARM_ERRATA_751472 causes omap4 blaze > > to not boot when enabled. The ARM core on it is an earlier r1p2: > > > > CPU: ARMv7 Processor [411fc092] revision 2 (ARMv7), cr=10c53c7d > > > > Unfortunately I don't have the details of errata 751472, but I'm > > guessing we need to disable it for r1p*. > > I checked the CA9MP errata document and this erratum impacts all > r0/r1/r2 CPUs. I am wondering if the problem is because the workaround > requires you to set a bit in the Diagnostic Control register and the > read-modify-write sequence provided in the workaround is for secure > mode. Not sure if there is a non-secure workaround available :-( So it seems :( And I guess we still don't have a generic way to check if the core has secure mode or not, and what registers are accessible in secure mode. Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
