* Tony Lindgren <tony@xxxxxxxxxxx> [120927 11:45]: > * Tomi Valkeinen <tomi.valkeinen@xxxxxx> [120927 00:20]: > > > I could be mistaken how to HW works (but it does work like that for > > dss), but sounds to me that uart and gpio drivers (and perhaps some > > others, I didn't go through all the pins) need similar pin->regulator > > mapping as you suggested for omapdss. > > Yes it seems that there are supply voltage regulator domains > that are specific to some subsystems. I wonder if these are needed > in all mux modes, or only when the pins are muxed for that particular > subsystem? It could be that the documentation is missing some > information here.. > > For example, what happens if you try to use some vdds_dsi powered > pin in GPIO mode without vdds_dsi? Seems like this may provide some clues from "3.6 Power-up and Power-down": "If the SDI, DSI, or CSI2 and CSIb interfaces are used in standard LVCMOS mode (that is, GPIO mode) rather than PHY mode (that is, serial differential mode), then vdds_sdi, vdds_dsi, vdds_csi2, and vdds_csib may also be connected to vdds. Please, see the recommended SDI, DSI, CSI2, and CSIb power supply noise of Table 3-5, Recommended Operating Conditions." So based on that it seems that tweaking of the regulators for these pins is only needed for DSS etc, not for GPIO or serial usage. Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
