On 07/09/2012 11:47 AM, Kevin Hilman wrote: > Santosh Shilimkar <santosh.shilimkar@xxxxxx> writes: > >> From: R Sricharan <r.sricharan@xxxxxx> >> >> OMAP socs has a legacy and a highlander version of the >> 32k sync counter IP. The register offsets vary between the >> highlander and the legacy scheme. So use the 'SCHEME' >> bits(30-31) of the revision register to distinguish between >> the two versions and choose the CR register offset accordingly. > > Do these scheme bits exist on *all* OMAPs? including OMAP1? By the way, I believe that for early devices only the lower 8-bits were used and the upper bits return 0. For OMAP5912 I read 0x00000010 from the REV register and so this change should be safe for OMAP1 devices. Cheers Jon -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
