[PATCH 2/2] OMAP4430: USB Host: Implement workaround for Errata i687

[Ruslan Bilovol <ruslan.bilovol@xxxxxx>]

The OMAP4 EHCI controller has the following defect (errata ID i687):

Title:
	USB TLL Hold Timing Violation

Description:
	There is a timing hold violation on an internal logic on
	the clock USB TLL path resulting in a systematic connection
	failure on the TLL link

WORKAROUND:
	As part of workaround, next should be done:
	Set the I/O drive strength to 1.
	Depending which USB host subsystem is used,
	• Port B1 used: Set CONTROL.CONTROL_SMART2IO_PADCONF_2[11] USBB1_DR0_DS = 0x1
	• Port B2 used: Set CONTROL.CONTROL_SMART2IO_PADCONF_2[12] USBB2_DR0_DS = 0x1

All OMAP4430 devices are impacted.

Signed-off-by: Ruslan Bilovol <ruslan.bilovol@xxxxxx>
---
 arch/arm/mach-omap2/usb-host.c |   17 +++++++++++++++++
 1 files changed, 17 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index dde8a11..3a6f2a2 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -30,6 +30,7 @@
 #include <plat/usb.h>
 #include <plat/omap_device.h>
 
+#include "control.h"
 #include "mux.h"
 
 #ifdef CONFIG_MFD_OMAP_USB_HOST
@@ -252,6 +253,14 @@ void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
 			OMAP_PIN_INPUT_PULLDOWN);
 		omap_mux_init_signal("usbb1_ulpitll_dat7",
 			OMAP_PIN_INPUT_PULLDOWN);
+
+		/* Errata i687: set I/O drive strength to 1 */
+		if (cpu_is_omap443x()) {
+			u32 val;
+			val = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2);
+			val |= OMAP4_USBB1_DR0_DS_MASK;
+			omap4_ctrl_pad_writel(val, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2);
+		}
 			break;
 	case OMAP_USBHS_PORT_MODE_UNUSED:
 	default:
@@ -309,6 +318,14 @@ void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
 			OMAP_PIN_INPUT_PULLDOWN);
 		omap_mux_init_signal("usbb2_ulpitll_dat7",
 			OMAP_PIN_INPUT_PULLDOWN);
+
+		/* Errata i687: set I/O drive strength to 1 */
+		if (cpu_is_omap443x()) {
+			u32 val;
+			val = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2);
+			val |= OMAP4_USBB2_DR0_DS_MASK;
+			omap4_ctrl_pad_writel(val, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2);
+		}
 			break;
 	case OMAP_USBHS_PORT_MODE_UNUSED:
 	default:
-- 
1.7.1

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