Hi Kevin, On Tue, May 1, 2012 at 1:15 AM, Kevin Hilman <khilman@xxxxxx> wrote: > Hi Jean, > > jean.pihet@xxxxxxxxxxxxxx writes: > >> From: Jean Pihet <j-pihet@xxxxxx> >> >> . Implement the devices wake-up latency constraints using the global >> device PM QoS notification handler which applies the constraints to the >> underlying layer, >> . Implement the low level code which controls the power domains next >> functional power states [3], through the hwmod and pwrdm layers, >> . Add cpuidle and power domains wake-up latency figures for OMAP3, cf. >> comments in the code and [1] for the details on where the numbers >> are magically coming from, >> . Implement the relation between the cpuidle and per-device PM QoS frameworks >> in the OMAP3 specific idle callbacks. >> The chosen C-state shall satisfy the following conditions: >> . the 'valid' field is enabled, >> . it satisfies the enable_off_mode flag, >> . the next state for MPU and CORE power domains is not lower than the >> state programmed by the per-device PM QoS. > > I've just been through this series and it looks good to me. > > Reviewed-by: Kevin Hilman <khilman@xxxxxx> Thx for reviewing! >> ToDo: >> 1. support OMAP4 chipset when the low power modes will be supported > > Have you been able to do this with Tero's latest CORE RET and device off > series? No I still have to port Tero's latest patch set on top of the functional power states and the constraints code. This is on my ToDoNext list ;p > > Kevin > Thanks, Jean -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
