Re: Incorrect Register Offsets in OMAP Mailbox

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Sorry about that. Kind of new at this.
-H

Signed-off-by: Henry Chan <enli.chan@xxxxxxxxx>

On 03/05/12 11:34, Tony Lindgren wrote:
> Hi Henry,
> 
> * Henry Chan <enli.chan@xxxxxxxxx> [120207 09:25]:
>> Hi,
>>
>> Looks like the register offsets are incorrect in the OMAP mailbox code
>> (arch/arm/mach-omap2/mailbox.c) for the OMAP4_MAILBOX_IRQ* macros. The
>> discrepancy is with p.224 of TI document SPRUGX9 and p3891 of SWPU231K.
>> Patch attached.
>>
>> My hardware hasn't come in yet, so I would appreciate it if anyone can
>> share their experience using this code.
> 
> Can you please reply with your Signed-off-by, it's missing from the
> patch.
> 
> Thanks,
> 
> Tony
> 
>> --- a/arch/arm/mach-omap2/mailbox.c
>> +++ b/arch/arm/mach-omap2/mailbox.c
>> @@ -26,9 +26,9 @@
>>  #define MAILBOX_IRQSTATUS(u)		(0x100 + 8 * (u))
>>  #define MAILBOX_IRQENABLE(u)		(0x104 + 8 * (u))
>>  
>> -#define OMAP4_MAILBOX_IRQSTATUS(u)	(0x104 + 10 * (u))
>> -#define OMAP4_MAILBOX_IRQENABLE(u)	(0x108 + 10 * (u))
>> -#define OMAP4_MAILBOX_IRQENABLE_CLR(u)	(0x10c + 10 * (u))
>> +#define OMAP4_MAILBOX_IRQSTATUS(u)	(0x104 + 0x10 * (u))
>> +#define OMAP4_MAILBOX_IRQENABLE(u)	(0x108 + 0x10 * (u))
>> +#define OMAP4_MAILBOX_IRQENABLE_CLR(u)	(0x10c + 0x10 * (u))
>>  
>>  #define MAILBOX_IRQ_NEWMSG(m)		(1 << (2 * (m)))
>>  #define MAILBOX_IRQ_NOTFULL(m)		(1 << (2 * (m) + 1))
>>
> 
-- 
Henry Chan
--
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