Re: omap-serial RX DMA polling?

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On Tue, 24 Jan 2012, Paul Walmsley wrote:

> We (meaning the people working on OMAP) also need to figure out here 
> what the OMAP UART RX timeout would theoretically be, since it doesn't 
> appear to be documented.

Correction.  The UART RX timeout is documented in section 17.4.4.1.3.7.1 
"Time-out Counter" of the 34xx TRM vZT.  The counter starts when the RX 
line is high, sampled in the middle of the bit, and continues for "4x 
programmed word length + 12 bits".  So at 115200 8n1 this looks like
382 microseconds, counted from the center of the stop bit.

Since a wakeup for this event isn't delivered when the UART is in a 
low-power idle state, we should probably consider keeping the UART out of 
idle in the RX path until we get a RX timeout interrupt.  This interrupt 
is only delivered when the RX FIFO has data in it, so we'd have to avoid 
draining the RX FIFO completely if we wanted to use this.


- Paul
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