On Fri, Oct 28, 2011 at 1:51 PM, Matthieu CASTET <matthieu.castet@xxxxxxxxxx> wrote: > Javier Martinez Canillas a écrit : >> On Fri, Oct 28, 2011 at 12:30 PM, Matthieu CASTET >> <matthieu.castet@xxxxxxxxxx> wrote: >>> PS : note that some OMAP ROM support a better protection than Hamming (but the >>> details are not public AFAIK) >>> >>> From OMAP34xx Multimedia Device, Silicon Revision 3.1.x, public version : >>> >>> Pages can contain errors caused by memory alteration. To correct these errors, >>> the ROM code uses ECC, >>> based on Hamming codes for SLC NAND and BCH (Bose, Ray-Chaudhuri, Hocquenghem) >>> code for >>> multilevel cell (MLC) devices. The computed ECC is compared to ECC stored in the >>> spare area of the >>> corresponding page. If there are uncorrectable errors, the ROM code returns with >>> FAIL. >>> >> >> Yes I've read that on the DM3730 TRM but as far as I understand only >> applies to MLC devices, but ours is SLC. >> > It also works on SLC devices. We are using it on micron slc that need 4 bits ECC. > That is a great thing to know, I didn't get that from the documentation (DM3730 TRM). And this ECC scheme that is supported for SLC devices it is also BCH? Or the ROM boot uses a different algorithm to calculate the codes to be stored on the oob? Thank and best regards, -- Javier Martínez Canillas (+34) 682 39 81 69 Barcelona, Spain -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
