Hi Benoit,
On 10/7/2011 3:23, Cousson, Benoit wrote:
Hi Paul & Jon,
On 10/7/2011 3:42 AM, Paul Walmsley wrote:
+ Benoît
On Fri, 16 Sep 2011, Jon Hunter wrote:
From: Jon Hunter<jon-hunter@xxxxxx>
Currently the interface clocks for the two SLIMBUS peripherals are
named slimbus1_fck and slimbus2_fck. Rename these clocks to be
slimbus1_ick and slimbus2_ick so it is clear that these are
interface clocks and not functional clocks.
Signed-off-by: Jon Hunter<jon-hunter@xxxxxx>
This one, I don't quite understand. We should probably be removing these
MODULEMODE-only clocks from the OMAP4 tree, and using their parent clock
as the main_clk. That would be a good cleanup for 3.3...
Yes, but in order to remove that from the clock data we must ensure that
the hwmod entry is there.
I kept a lot of legacy MODULEMODE clocks just because of missing hwmod /
runtime_pm adaptation on some drivers.
In the case of slimbus, there is no main_clk but a bunch of optional
clocks. It looks similar to the DSS case. So we should not use the
parent clock as a main_clk.
We should probably promote one of the opt_clk as the main_clk. The
slimbus_clk seems to be the good candidate for both instances.
static struct omap_hwmod_opt_clk slimbus1_opt_clks[] = {
{ .role = "fclk_1", .clk = "slimbus1_fclk_1" },
{ .role = "fclk_0", .clk = "slimbus1_fclk_0" },
{ .role = "fclk_2", .clk = "slimbus1_fclk_2" },
{ .role = "slimbus_clk", .clk = "slimbus1_slimbus_clk" },
};
static struct omap_hwmod_opt_clk slimbus2_opt_clks[] = {
{ .role = "fclk_1", .clk = "slimbus2_fclk_1" },
{ .role = "fclk_0", .clk = "slimbus2_fclk_0" },
{ .role = "slimbus_clk", .clk = "slimbus2_slimbus_clk" },
};
Jon,
Do you know if that one is indeed mandatory to use the slimbus IP?
Sorry, are you asking about the clocks I was re-naming or the
slimbus_clk you are referring to above?
Looking at the clock tree tool, the slimbus_clk is the actual external
slimbus clock that can be generated by OMAP or by an external device.
The TRM states ...
"Most of the SLIMbus module runs off two main clocks: the L4 interface
clock for the data input and output registers, and the control and
status control registers; and the SLIMbus clock, taken from the serial
interface (CLK line) for the SLIMbus-side logic.
The SLIMbus controller operates as clock source component (active
framer), which drives the SLIMbus clock line CLK, or as clock receiver
component, which gets its clock from the same CLK line."
So, if you are operating as the clock source component on the bus then
one of the optional clocks to drive the peripheral logic and if you are
the clock receiver then you use slimbus_clk.
Cheers
Jon
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