Hi, On Fri, Sep 23, 2011 at 11:31 AM, Tomi Valkeinen <tomi.valkeinen@xxxxxx> wrote: > On Fri, 2011-09-23 at 11:22 +0530, K, Mythri P wrote: > >> > - What is dcofreq? Looking at the code, it tells if the pixel clock is > >> > 1000MHz. Why is such a field needed, can't the HDMI driver manage that >> > itself? And if it's needed, why is it called dcofreq, the name doesn't >> > make much sense to me. >> It is DCO frequency, It suggest the frequency selector range , > > The field is not DCO frequency, it's a boolean, 0 or 1. That's why the > name doesn't really make sense to me. > >> HDMI_PLL_CONFIGURATION2 (3:1) has to be set accordingly by the driver >> depending on whether the CLKOUTLDO is greater than or less than >> 1000Mhz, but anyways the decision is taken by the driver. > > But can't it be done in the ti_hdmi driver, at the same time when > programming the registers? Why do we need to set the boolean beforehand. > It can be done, It is not a boolean , boolean logic is used to determine the value 0x2 / 0x4. Page # 101. (DCO frequency). >> Also the name is as suggested by TRM . > > I couldn't find boolean dcofreq in the TRM. > >> > - We are doing HDMI PLL calculations in the omapdss drivers hdmi.c file. >> > The PLL calculations are PLL specific, and thus should be in the >> > specific HDMI implementation file, right? >> > >> >> + seq_printf(s, "DISPC clock source %s (%s)\t(%s)\n", >> >> + dss_get_generic_clk_source_name(dispc_clk_src), >> >> + dss_feat_get_clk_source_name(dispc_clk_src), >> >> + dispc_clk_src == OMAP_DSS_CLK_SRC_FCK ? >> >> + "off" : "on"); >> > >> > Why do you print DISPC clock source? How is that part of HDMI clock >> > configuration? >> Reason is to check whether the DISPC clock source is PRCM / DSI PLL, >> Because DSI PLL might not be sufficient. > > But it's already printed by the DISPC section, and it's not part of > HDMI, so I don't quite see the need. > > What do you mean DSI PLL might not be sufficient? We can get higher > DISPC clocks with DSI PLL than with PRCM. Well , from the older calculation / values passed to DSI , it was seen that DSI PLL was in the order of 156Mhz, and PRCM with 186Mhz. This had resulted in underflow issues with HDMI. > Thanks and regards, Mythri. > Tomi > > > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
