Santosh Shilimkar <santosh.shilimkar@xxxxxx> writes:
> This patch adds the MPUSS OSWR (Open Switch Retention) support. The MPUSS
> OSWR configuration is as below.
> - CPUx L1 and logic lost, MPUSS logic lost, L2 memory is retained
>
> OMAP4460 onwards, MPUSS power domain doesn't support OFF state any more
> anymore just like CORE power domain. The deepest state supported is OSWR.
> On OMAP4430 secure devices too, MPUSS off mode can't be used because of
> a bug which alters Ducati and Tesla states. Hence MPUSS off mode as an
> independent state isn't supported on OMAP44XX devices.
>
> Ofcourse when MPUSS power domain transitions to OSWR along
> with device off mode, it eventually hits off state since memory
> contents are lost.
>
> Hence the MPUSS off mode independent state is not attempted without
> device off mode. All the necessary infrastructure code for MPUSS
> off mode is in place as part of this series.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@xxxxxx>
> Cc: Kevin Hilman <khilman@xxxxxx>
Compile failure for the !CONFIG_PM case:
[...]
> @@ -70,11 +71,18 @@ static inline int omap4_mpuss_init(void)
> {
> return 0;
> }
> -
> +static inline u32 omap4_mpuss_read_prev_context_state(void)
> +{
> + return 0;
> +}
added here
> static inline int omap4_finish_suspend(unsigned long cpu_state)
> {}
> static inline void omap4_cpu_resume(void)
> {}
> +static inline u32 omap4_mpuss_read_prev_context_state(void)
> +{
> + return 0;
> +}
same thing added here
Kevin
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