Hi Rob,
On 8/25/2011 3:37 PM, Rob Herring wrote:
Benoit,
[...]
+ gic: interrupt-controller@48241000 {
+ compatible = "ti,omap4-gic", "arm,gic";
The gic binding is still being hashed out. This needs binding
documentation and handling of PPIs. I'm planning on posting an updated
series today with this.
"arm,gic" should be dropped or replaced with "arm,cortex-a9-gic".
Non-specific DT bindings are not well received. Is OMAP4 gic different
from standard Cortex-A9?
Not at all. We named it like that based on Grant's comment:
http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393
I'll update it with the new binding.
+ interrupt-controller;
+ #interrupt-cells =<1>;
+ reg =<0x48241000 0x1000>,
+ <0x48240100 0x0200>;
Isn't the cpu interface register space 0x100 bytes long?
I've just checked the spec, and this is indeed 256 bytes. I'll fix that.
Thanks for the comments.
Regards,
Benoit
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